(a) Field of the Invention
The present invention relates to semiconductor device, and more particularly it pertains to semiconductor device having a source, a channel and a gate.
(b) Description of the Prior Art
Known static induction transistor, as well as static induction type thyristor devices have a structure similar to field effect transistor in that they have a source, a channel and a gate. However, these known transistors and thyristors are different from field effect transistor in that the former have a very small series resistance between the intrinsic gate which substantially controls the current from the source, and also in that the channel can be rendered pinched off only by the voltage between the gate and the source, which voltage including the built-in potential. In the pinched-off state of these static induction type transistor and static induction type thyristor devices, the potential profile between the gate regions has such configuration that the potential becomes progressively lower as it approaches the center of the channel from the gate region, and the potential becomes minimum at the center of the channel. When this potential is viewed in the direction of the main current flow, the potential increases progressively from the source, and via a maximum value, it gradually decreases. Accordingly, the potential distribution or profile exhibits a saddle shape within the channel region. When viewed in a section of the channel, the potential rises progressively as the portion of the channel goes toward the gate region from the saddle point. In this specification, the particular semiconductor region whereat the potential difference departing from the potential at the saddle point is able to become substantially to the value of thermal energy is called either an intrinsic gate region or an effective channel region. It is needless to say that the words "thermal energy" mean the energy at that temperature which is noted in the operative state of a semiconductor device, and that this energy is not one noted at the ambient temperature. Also, the term "the width of the effective channel" mean the dimensions of the effective channel region running in a direction perpendicular to the direction of current flow, and the term "the length of the effective channel region" mean the dimensions of said effective channel region running in the direction of current flow.
A junction static induction transistor comprises: a heavily-doped source region of a certain conductivity type; a heavily-doped drain region of said certain conductivity type; a lightly-doped channel region of said certain conductivity type disposed between said source and drain regions for allowing charge carriers to flow from said source region to said drain region through said channel region; a heavily-doped gate region of a conductivity type opposite to said certain conductivity type formed adjacent to said channel region for developing a depletion layer into said channel region and capable of pinching-off said channel region by the depletion layer. That portion of the channel region at which the flow of charge carriers is controlled substantially by the potential thereat (i.e. the saddle point of the gate-to-gate potential profile) is called the intrinsic gate region which almost coincides with the effective channel region. The resistance of the region(s) from said source region to said intrinsic gate region inclusive, i.e. the series resistance which develops negative feedback action, is made less than 1/G.sub.m at least in the low drain current operational region where G.sub.m represents the true transconductance of the transistor. The small series resistance means that the static induction transistor has a short channel structure. If the channel is made wide, this is effective in reducing said series resistance, but the surface area of the device will inevitably become large. Depending on purposes, various types of gate structures have been proposed including an insulated gate structure as is employed in insulated or metal-insulator-semiconductor gate field effect transistor, and a Schottky or metal-semiconductor gate structure.
The static induction type thyristor has been formed basically by substituting the drain region of said certain conductivity type by a semiconductor region of a conductivity type opposite to said certain conductivity type in said transistor structure to form a diode structure.
A static induction transistor (SIT), in principle, is a transistor which has a very small series (negative feedback) resistance within that channel region, and which is able to form a potential barrier within the current path. Control of this potential barrier is effected by a gate voltage and a voltage of one of the main current terminals (in the case of transistor, it is drain). Accordingly, so long as a potential barrier is present within the channel at the operative state of the transistor, and so long as it is possible to approximate as infinite the carrier density of the semiconductor region on the source side of this barrier, the drain current, basically, will increase exponentially relative to an increase in the gate voltage (including a decrease in the reverse gate voltage) and the drain voltage.
As a result of subsequent research and developments, there has been materialized such a device which effectively utilizes the minority carrier injection from the gate region by forwardly biasing this gate region. This effective utilization means increasing the drain current. More particularly, by injecting minority carriers from the gate region into the channel region located close to the source region by the use of a short channel structure having a small series resistance, it is possible to have the device pull down the height; of the potential barrier and also attract majority carriers from the source region. As the amount of those carriers taken out from the source approaches the limit, the device will begin to exhibit a saturating type characteristic similar to that of a bipolar transistor.
In order to effectively control the potential of the intrinsic gate, it is necessary to make the ratio .eta. of variation of the potential of the intrinsic gate relative to the variation of the gate potential as great as possible, i.e. the potential of the intrinsic gate be changed by the gate potential as faithful as possible. To this end, it is preferable that the distance between the source region and the intrinsic gate be great. In order to effectively utilize minority carrier injection in forward bias mode, however, it is not desirable to provide a great distance between the source region and the intrinsic gate.
In such known static induction transistors, the width of the overall channel region constitutes an important factor which governs both the negative feedback resistance and the maximum permissible current value. Basically speaking, however, this width has been determined in the past by the impurity concentration of the channel region and also by the gate voltage employed. For example, in a junction gate device, the built-in junction potential between the gate region and the channel region is determined by the respective impurity concentrations of these two regions. If the channel has a width almost equal to or greater than the width of the depletion layer developed by the built-in potential at the junction, such device is intended mainly for use in the so-called depletion mode of normally-on to type operation. On the other hand if the channel width is less than the width of the depletion layer, the device is intended mainly for use in the so-called enhancement mode of normally-off type operation and is rendered conductive by by the application of a forward voltage to the gate electrode.
An increase in the width of the effective channel, substantially through which current flows, may be achieved if the impurity concentration of the overall channel region is lowered and if the distance between the gates is enlarged. In order to obtain a large current, in view of restrictions from the viewpoint of the manufacturing techniques and the rise in temperature, a multi-channel structure is often adapted. However, even in such a multi-channel structure, the situation or circumstance is the same if each of such channels is considered independently of each other.
For the purpose of elevating packing density, it is desirable to make the gate-to-gate distance small. Such an attempt, however, requires elevation of the impurity concentration of the channel region, and the width of the effective channel region will become small. Where the impurity concentration of the channel region is high, it becomes necessary to make the width of the channel region in the direction perpendicular to the direction of current flow small in order to achieve pinch-off state. Accordingly, the series resistance will become large, and the gate capacitance will become large also. Thus, these factors will constitute a cause for limiting high-speed operation or high-frequency operation.
Another cause of limiting the high frequency characteristic of SIT is in the potential distribution or profile near the intrinsic gate. More particularly, in the vicinity of the intrinsic gate, the potential gradient in the direction of current flow is gentle, and therefore, the speed of travel of electrons will become small. If, however, the length of the channel region is made as small as possible, this will result in enhancing the high frequency characteristic. Also, in order to increase the gate voltage efficiency .eta., it is effective to a certain extent to separate the positions of the source and the intrinsic gate apart from each other. If however, the distance between the high impurity concentration source region and the intrinsic gate is excessively great, the number of those majority carriers injected from the source region into the intrinsic gate, as well as the proportion of those minority carriers which are injected from the gate region into the channel region which reach the vicinity of the source region will decrease, and accordingly the drain current I.sub.d will decrease. Therefore, the transconductance g.sub.m =dI.sub.D /dV.sub.G will cease to elevate so much, and the resistance at the time of conduction inconveniently will become great.
As stated above, the width of the channel region is determined by its impurity concentration of this region, and furthermore the distance between the source region and the intrinsic gate cannot be made very long. Accordingly, the gate voltage efficiency .eta. has, in the past, been about 0.5 or smaller in known practical static induction type devices.
A static induction type thyristor, representing an application of the principle of known static induction type transistor, is basically arranged with a channel structure and a gate structure similar to those of static induction type transistor, provided within at least one region of a pn (more correctly, pin or p.pi.n or p.mu.n) diode. Such thyristor exhibits a characteristic which may be called that of a gated diode. In contrast thereto, conventional pnpn thyristor may be interpreted as a composite structure of a pnp transistor and an npn transistor which positively feedback to each other. The static induction type thyristor may on the other hand be interpreted as a composite structure of a static induction type transistor and a diode. The known pnpn thyristor and said static induction type thyristor are same in that the main current is formed with carriers of both polarities. However, the principles of the operation mechanisms of the conventional thyristor and the gated diode (static induction type thyristor) are different from each other.
Static induction type thyristor has the advantages represented by high input impedance, high-speed, large current operation similar to static induction type transistor. However, its ability still leaves a great possibility to be improved.